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ES25P80-75IC2Y 参数 Datasheet PDF下载

ES25P80-75IC2Y图片预览
型号: ES25P80-75IC2Y
PDF下载: 下载PDF文件 查看货源
内容描述: 8Mbit的CMOS 3.0伏闪存为75Mhz SPI总线接口 [8Mbit CMOS 3.0 Volt Flash Memory with 75Mhz SPI Bus Interface]
分类和应用: 闪存
文件页数/大小: 35 页 / 436 K
品牌: EXCELSEMI [ EXCEL SEMICONDUCTOR INC. ]
 浏览型号ES25P80-75IC2Y的Datasheet PDF文件第21页浏览型号ES25P80-75IC2Y的Datasheet PDF文件第22页浏览型号ES25P80-75IC2Y的Datasheet PDF文件第23页浏览型号ES25P80-75IC2Y的Datasheet PDF文件第24页浏览型号ES25P80-75IC2Y的Datasheet PDF文件第26页浏览型号ES25P80-75IC2Y的Datasheet PDF文件第27页浏览型号ES25P80-75IC2Y的Datasheet PDF文件第28页浏览型号ES25P80-75IC2Y的Datasheet PDF文件第29页  
E S I  
E S I  
ADVANCED INFORMATION  
Excel Semiconductor inc.  
In most application it is best to read the full 256-byte  
contents of the page into a temporary RAM. Data  
can then be modified as needed and the entire 256  
bytes can then be reprogrammed into the Parameter  
Page at one time.  
Program Parameter Page (PPP)  
The Program Parameter Page instruction allows up  
to 256 bytes to be programmed at memory word  
locations that have been previously erased to all 1s  
“FFFFh” A Write Enable(WREN) instruction must  
be executed before the device will accept the Pro-  
gram Parameter Page instruction(Status Register  
bit WEL must equal 1). The instruction is initiated  
by driving the CS# pin low then shifting the instruc-  
tion code “52h” followed by a 24-bit address(A23-  
A0) and at least one bytes, into the SI pin. Only the  
lower 8 address bits (A7-A0) are used, the 16 upper  
most address bit (A23-A8) are ignored. The CS#  
pin must be held low for the entire length of the  
instruction while data is being sent to the device.  
The Program Parameter Page instruction sequence  
is shown in Figure 21.  
As with the write and erase instruction, the CS#  
must be driven high after the eighth bit of the last  
byte has been latched. If this is not doen the Param-  
eter Page Program instruction will not be executed.  
After CS# is driven high, the self timed Page Pro-  
gram instruction will commence for a time duration of  
t , as specified in Table 8. While The Page Program  
PP  
cycle is in progress, the Read Status Register  
instruction may still be accessed for checking the  
status of the WIP bit. The WIP bit is a 1 during the  
program cycle and becomes a 0 when the cycle is  
finished and the device is ready to accept other  
instruction again. After the program cycle has  
started the Write Enable Latch(WEL) bit in the Status  
Register is cleared to 0. The Program Parameter  
Page instruction will not be excecuted if the  
addressed page is protected by the Block Pro-  
tect(BP2, BP1, BP0) bits  
Less than 256 bytes can be programmed without  
having any effect on other data within the page. If  
more than 256 bytes are sent to the device the  
addressing will wrap to the beginning of the page. If  
previously written data bytes are over-written the  
data will not be valid.  
CS#  
0
0
1
2
3
4
5
6
7
8
9
10  
28 29 30 31 32 33 34 35 36 37 38 39  
SCK  
SI  
Data Byte1  
Instruction  
24-Bit Address  
1
0
1
0
0
1
0
1
4
2
0
1
7
3
22 21  
0
6
5
23  
2
MSB  
MSB  
CS#  
SCK  
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55  
Data Byte 2  
Data Byte 3  
Data Byte256  
1
4
2
0
1
7
6
5
3
4
2
0
1
7
5
3
4
2
0
6
SI  
7
5
3
6
MSB  
MSB  
MSB  
Figure 21. Program Parameter Page (PPP) Instruction Sequence  
25  
Rev. 0D May, 11, 2006  
ES25P80  
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