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ES25P16 参数 Datasheet PDF下载

ES25P16图片预览
型号: ES25P16
PDF下载: 下载PDF文件 查看货源
内容描述: 16Mbit的CMOS 3.0伏闪存为75Mhz SPI总线接口 [16Mbit CMOS 3.0 Volt Flash Memory with 75Mhz SPI Bus Interface]
分类和应用: 闪存
文件页数/大小: 35 页 / 436 K
品牌: EXCELSEMI [ EXCEL SEMICONDUCTOR INC. ]
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E S I  
E S I  
ADVANCED INFORMATION  
Excel Semiconductor inc.  
The Deep Power Down mode can only be entered  
by executing the Deep Power Down (DP) instruc-  
tion to reduce the standby current (from I to I  
Deep Power Down (DP)  
The Deep Power Down (DP) instruction puts the  
device in the lowest current mode of 1uA typical.  
SB  
DP  
as specified in Table 6). As soon as Chip Select  
(CS#) is driven high, it requires a delay of t cur-  
DP  
It is recommended that the standard Standby mode  
be used for the lowest power current draw, as well as  
the Deep Power Down (DP) as an extra software  
protection mechanism when this device is not in  
active use. In this mode, the device ignores all Write,  
Program and Erase instructions. Chip Select (CS#)  
must be driven Low for the entire duration of the  
sequence.  
rently in progress before Deep Power Down mode  
is entered.  
Once the device has entered the Deep Power  
Down mode, all instructions are ignored except the  
Release from Deep Power Down (RES) and Read  
Electronic Signature. This releases the device from  
the Deep Power Down mode. The Release from  
Deep Power Down and Read Electronic Signature  
(RES) instruction also allows the Electronic Signa-  
ture of the device to be output on Serial Data Out-  
put (SO).  
The Deep Power Down (DP) instruction is entered by  
driving Chip Select (CS#) Low, followed by the  
instruction code on Serial Data Input (SI). Chip  
Select (CS#) must be driven Low for the entire dura-  
tion of the sequence.  
The Deep Power Down mode automatically stops  
at Power-down, and the device always powers up  
in the Standby mode.  
The instruction sequence is shown in Figure 16.  
Driving Chip Select (CS#) High after the eighth bit of  
the instruction code has been latched puts the device  
in Deep Power Down mode.  
Any Deep Power Down (DP) instruction, while an  
Erase, Program or WRSR cycle is in progress, is  
rejected without having any effect on the cycle in  
progress.  
CS#  
t
DP  
0
1
2
3
4
5
6
7
SCK  
Instruction  
SI  
1
0
1
1
1
0
0
1
Deep Power  
Down Mode  
Standby Mode  
Figure 16. Deep Power Down ( DP ) Instruction Sequence  
21  
Rev. 0E May 11 , 2006  
ES25P16  
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