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ES25P16 参数 Datasheet PDF下载

ES25P16图片预览
型号: ES25P16
PDF下载: 下载PDF文件 查看货源
内容描述: 16Mbit的CMOS 3.0伏闪存为75Mhz SPI总线接口 [16Mbit CMOS 3.0 Volt Flash Memory with 75Mhz SPI Bus Interface]
分类和应用: 闪存
文件页数/大小: 35 页 / 436 K
品牌: EXCELSEMI [ EXCEL SEMICONDUCTOR INC. ]
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E S I  
E S I  
ADVANCED INFORMATION  
Excel Semiconductor inc.  
If fewer than 256 data bytes are sent to device, they  
are correctly programmed at the requested  
addresses without having any effects on the other  
bytes of the same page.  
Page Program (PP)  
The Page Program (PP) instruction allows bytes to  
be programmed in the memory (changing from 1 to  
0). Before it can be accepted, a Write Enable  
(WREN) instruction must previously have been exe-  
cuted. After the Write Enable (WREN) instruction  
has been decoded, the device sets the Write Enable  
Latch (WEL).  
Chip Select (CS#) must be driven High after the  
eighth bit of the last data byte has been latched in,  
otherwise the Page Program (PP) instruction is not  
executed. As soon as Chip Select (CS#) is driven  
High, the self-timed Page Program cycle (whose  
duration is t ) is initiated. While the Page Program  
The Page Program (PP) instruction is entered by  
driving Chip Select (CS#) Low, followed by the  
instruction code, three address bytes and at least  
one data byte on Serial Data Input (SI). Chip Select  
(CS#) must be driven Low for the entire duration of  
the sequence.  
PP  
cycle is in progress, the Status Register may be  
read to check the value of the Write In Progress  
(WIP) bit. The Write In Progress (WIP) bit is 1 dur-  
ing the self-timed Page Program cycle, and is 0  
when it is completed. At some unspecified time  
before the cycle is completed, the Write Enable  
Latch (WEL) bit is reset.  
The instruction sequence is shown in Figure 13.  
A Page Program (PP) instruction applied to a page  
that is protected by the Block Protect (BP2, BP1,  
BP0) bits (see Table 1) is not executed.  
If more that 256 data bytes are sent to the device,  
the addressing will wrap to the beginning of the  
same page, previously latched data are discarded  
and the last 256 data bytes are guaranteed to be  
programmed correctly within the same page.  
CS#  
0
0
1
2
3
4
5
6
7
8
9
10  
28 29 30 31 32 33 34 35 36 37 38 39  
SCK  
SI  
Data Byte1  
Instruction  
24-Bit Address  
0
0
0
0
0
1
0
1
4
2
0
1
7
5
3
22 21  
0
6
23  
2
MSB  
MSB  
CS#  
SCK  
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55  
Data Byte 2  
Data Byte 3  
Data Byte256  
1
4
2
0
1
7
6
5
3
4
2
0
1
7
5
3
4
2
0
6
SI  
7
5
3
6
MSB  
MSB  
MSB  
Figure 13. Page Program (PP) Instruction Sequence  
18  
Rev. 0E May 11 , 2006  
ES25P16  
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