+5V
V
CC = +5V
T
A
= +25 C
PFI
PFO
1KΩ
30pF
+1.25V
Figure 4A. Power-Fail Comparator De-assertion
Response Time.
Figure 4B. Circuit for the Power-Fail Comparator De-
assertion Response Time.
+5V
V
CC = +5V
T
A
= +25 C
1KΩ
PFI
PFO
30pF
+1.25V
Figure 5A. Power-Fail Comparator Assertion Response
Time.
Figure 5B. Circuit for the Power-Fail Comparator
Assertion Response Time.
V
CC
T
A
= +25oC
RESET
V
CC
2KΩ
RESET
330pF
GND
Figure 6A. SP705/707 RESET Output Voltage vs.
Supply Voltage.
Figure 6B. Circuit for the SP705/707 RESET Output
Voltage vs. Supply Voltage.
June 2008 Rev C
SP705 Low Power Microprocessor Supervisory Circuits
© 2008 Exar Corporation
6
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