sensitivity to high-frequency noise on the
line being monitored. RESET can be used to
monitor voltages other than the +5V VCC
line. Connect PFO to MR to initiate a RESET
pulse when PFI drops below 1.25V. Figure 17
shows the SP705/706/707/708 configured to
assert RESET when the +5V supply falls below
the RESET threshold, or when the +12V supply
falls below approximately 11V.
Interfacing to mPs with Bidirectional
RESET Pins
µPs with bidirectional RESET pins, such as the
Motorola 68HC11 series, can contend with the
SP705/706/707/708 RESET output. If, for
example, the RESET output is driven HIGH and
the µP wants to pull it LOW, indeterminate
logic levels may result. To correct this, connect
a4.7KΩresistorbetweentheRESEToutputand
the µP reset I/O, as shown if Figure 19. Buffer
the RESET output to other system components.
Monitoring a Negative Voltage Supply
The power-fail comparator can also monitor a
negative supply rail, shown in Figure 18. When
the negative rail is good (a negative voltage of
large magnitude), PFO is LOW. By adding the
resistors and transistor as shown, a HIGH PFO
triggersRESET. AslongasPFOremainsHIGH,
the SP705-708/813L will keep RESET
asserted (where RESET = LOW and RESET =
HIGH). Note that this circuit's accuracy de-
pends on the PFI threshold tolerance, the VCC
line, and the resistors.
+5V
VCC
R
1
100KΩ
10KΩ
MR
PFI
Buffered RESET connects to System Components
PFO
2N3904
100KΩ
10KΩ
R2
RESET
to µP
+5V
V
+5V
V
V-
GND
CC
CC
5.0 - 1.25
1.25 - VTRIP
R
R
1
2
=
, VTRIP < 0
µP
RESET
RESET
4.7KΩ
+5V
MR
0V
+5V
0V
V-
V-
GND
GND
PFO
VTRIP
0V
Figure 18. Monitoring a Negative Voltage Supply
Figure 19. Interfacing to Microprocessors with
Bidirectional RESET I/O for the SP705/706/707/708
OCT 17-06 RevB
SP705 Low Power Microprocessor Supervisory Circuits
© 2008 Exar Corporation
12
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