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SP708EN 参数 Datasheet PDF下载

SP708EN图片预览
型号: SP708EN
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗微处理器监控电路 [Low Power Microprocessor Supervisory Circuits]
分类和应用: 微处理器光电二极管监控输入元件
文件页数/大小: 18 页 / 1041 K
品牌: EXAR [ EXAR CORPORATION ]
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Ensuring a Valid RESET Output Down to  
VCC = 0V  
Power-Fail Comparator  
The power-fail comparator can be used for  
various purposes because its output and  
noninverting input are not internally connected.  
The inverting input is internally connected to a  
1.25V reference.  
When VCC falls below 1.1V, the SP705/706/707/  
708 RESET output no longer sinks current, it  
becomes an open circuit. High-impedance  
CMOS logic inputs can drift to undetermined  
voltages if left undriven. If a pull-down resistor  
is added to the RESET pin, any stray charge or  
leakage currents will be shunted to ground,  
holding RESET LOW. The resistor value is not  
critical. Itshouldbeabout100K,largeenough  
not to load RESET and small enough to pull  
RESET to ground.  
To build an early-warning circuit for power  
failure, connect the PFI pin to a voltage divider  
as shown in Figure 16. Choose the voltage  
divider ratio so that the voltage at PFI falls  
below1.25Vjustbeforethe+5Vregulatordrops  
out. Use PFO to interrupt the µP so it can  
prepare for an orderly power-down.  
Monitoring Voltages Other Than the  
Unregulated DC Input  
Manual Reset  
The manual-reset input (MR) allows RESET to  
be triggered by a pushbutton switch. The switch  
is effectively debounced by the 140ms mini-  
mum RESET pulse width. MR is TTL/CMOS  
logic compatible, so it can be driven by an  
external logic line. MR can be used to force a  
watchdog timeout to generate a RESET pulse  
in the SP705/706/813L. Simply connect  
WDO to MR.  
MonitorvoltagesotherthantheunregulatedDC  
by connecting a voltage divider to PFI and  
adjusting the ratio appropriately. If required,  
add hysteresis by connecting a resistor (with a  
value approximately 10 times the sum of the  
two resistors in the potential divider network)  
betweenPFIandPFO. AcapacitorbetweenPFI  
and GND will reduce the power-fail circuit's  
Regulated +5V  
Power Supply  
+12V  
+5V  
V
Unregulated DC  
Power Supply  
0.1µF  
VCC  
1MΩ  
1%  
CC  
MR  
VCC  
R
1
2
PFI  
RESET  
RESET  
µP  
PFI  
MR  
INTERRUPT  
PFO  
PFI  
PFO  
130KΩ  
1%  
I/O LINE  
NMI  
R
SP705  
SP706  
SP813L  
WDO  
RESET  
to µP  
GND  
GND  
GND  
PUSHBUTTON  
SWITCH  
Figure 16. Typical Operating Circuit  
Figure 17. Monitoring Both +5V and +12V Power  
Supplies  
June 2008 Rev C  
SP705 Low Power Microprocessor Supervisory Circuits  
© 2008 Exar Corporation  
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