MP8831
DC ELECTRICAL CHARACTERISTICS
Test Conditions: V = 5V, GND = 0V and T = 25°C Unless Otherwise Specified
DD
A
Symbol
ADC
Parameter
Min.
Typ.
Max.
Unit
Conditions
n
Number of Bits
10
Bits
MSPS
LSB
FS
Max Effective Sample Rate
Differential Non-Linearity
1.67
-1.0
DNL
+0.75
2.0
Gain DAC=1/2 scale, offset
DAC=ZS
DNL
INL
Differential Non-Linearity
Integral Non-Linearity
-1.0
-3
2.0
3
LSB
LSB
Gain DAC=FS, offset DAC=ZS
Gain DAC=1/2 scale, offset
DAC=ZS, best fit straight line
INL
Integral Non-Linearity
-2
2
LSB
Gain DAC=FS, offset DAC=ZS,
best fit straight line
EZS
EFS
Zero Scale Error
Full Scale Error
DC input Range
–30
20
mV
mV
V
AINPP
GND
VDD
20
AIN can swing from GND to VDD
Digitizing range is set by DAC
codes.
.
CIN
Offset DAC
n
Input Capacitance
10
pF
Number of Bits
6
Bits
DNL
Differential Non-Linearity
-0.5
0.5
1
LSB
Measured at bottom of ADC refer-
ence ladder through a switch.
INL
Integral Non-Linearity
-1
LSB
V
Measured at bottom of ADC refer-
ence ladder through a switch.
VOZS
VOFS
MOC
Effective Zero Scale Voltage
Effective Full Scale Voltage
0.178
0.348
Measured at bottom of ADC refer-
ence ladder through a switch.
V
Measured at bottom of ADC refer-
ence ladder through a switch.
Maximum Change per
Conversion
100
% FS
After specified change in DAC set-
ting, the ADC should output the
same code ± 2LSB, assuming ana-
log input is constant.
ts-od
Gain DAC
n
Settling Time
300
ns
Not tested. Guaranteed by design.
Number of Bits
10
-1
Bits
DNL
Differential Non-Linearity
1
2
LSB
Measured at top of ADC reference
ladder through a switch.
INL
Integral Non-Linearity
-2
LSB
V
Measured at top of ADC reference
ladder through a switch, (BFSL).
VGZS
Effective Zero Scale Voltage
VOFS
0.00
Measured at top of ADC reference
ladder through a switch.
Offset DAC = ZS
Rev. 1.00
4
EXAR [ EXAR CORPORATION ]
