MP7543
TIMING DIAGRAM
t
SRI
Bit 1
MSB
Bit 12
LSB
SR1
Bit 2
Bit 11
11
t
, t
, t
t
, t
, t
DS1 DS2 DS4
DH1 DH2 DH4
1
2
12
Strobe Input
(STB1, STB2, STB4
(Note)
t
t
t
STB1
STB2
STB4
LOADING REGISTER A
t
ASB
t
t
LD1
LD2
LD1 AND LD2
Note:
Strobe Waveform is Inverted if
STB3 is Used to Strobe Serial Data Bits
into Register A
Loading Register B
with Contents of Register A
MP7543 Logic Inputs
Register A Control Inputs
Register B Control Inputs
MP7543 Operation
Notes
STB4 STB3 STB2 STB1
CLR
LD2
LD1
0
0
0
1
1
0
X
X
X
X
X
X
X
X
X
X
X
X
Data appearing at SRI strobed into Register A
Data appearing at SRI strobed into Register A
Data appearing at SRI strobed into Register A
Data appearing at SRI strobed into Register A
2, 3
2, 3
2, 3
2, 3
0
0
0
0
1
X
0
0
1
X
X
X
X
X
1
X
X
X
1
No Operation (Register A)
3
X
X
X
0
1
1
1
X
1
X
0
X
X
1
0
Clear Register B to code 0000 0000 0000 (Asynchronous)
No Operation (Register B)
1, 3
3
Load Register B with the contents of Register A
3
NOTES
1. CLR = 0 Asynchronously resets Register B to 0000 0000 0000, but has no effect on Register A.
2. Serial data is loaded into Register A MSB first, on edges shown
3. 0 = Logic LOW, 1 = Logic HIGH, X = Don’t Care.
is positive edge,
is negative edge.
Table 1. Truth Table
Rev. 2.00
6
EXAR [ EXAR CORPORATION ]
