MP7543
PIN OUT DEFINITIONS
PDIP, CDIP and SOIC
PLCC
PIN NO.
NAME
DESCRIPTION
PIN NO.
NAME
N/C
DESCRIPTION
No Connection.
1
I
I
DAC current output pin. Normally
terminated at op amp virtual ground.
1
2
OUT1
I
DAC current output pin. Normally
terminated at op amp virtual ground.
OUT1
2
DAC current output pin. Normally
terminated at AGND.
OUT2
3
I
DAC current output pin. Normally
terminated at AGND.
OUT2
3
4
5
AGND
STB1
LD1
Analog Ground.
Register A Strobe 1 input, See Table 1.
4
5
6
7
AGND
STB1
N/C
Analog Ground.
DAC Register B Load 1 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
Register A Strobe 1 input, See Table 1.
No Connection.
LD1
DAC Register B Load 1 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
6
7
8
9
N/C
No Connection.
SRI
Serial Data Input to Register A.
Register A Strobe 2 input, See Table 1.
STB2
LD2
8
N/C
No Connection.
DAC Register B Load 2 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
9
SR1
STB2
N/C
Serial Data Input to Register A.
Register A Strobe 2 input, See Table 1.
No Connection.
10
11
12
10
11
12
13
STB3
STB4
DGND
CLR
Register A Strobe 3 input, See Table 1.
Register A Strobe 4 input, See Table 1.
Digital Ground.
LD2
DAC Register B Load 2 input. When
LD1 and LD2 go low the contents of
Register A are loaded into DAC
Register B.
Register B CLEAR input (active
LOW), can be used to asynchronously
reset Register B to 0000 0000 0000.
13
14
15
16
17
STB3
STB4
DGND
N/C
Register A Strobe 3 input, See Table 1.
Register A Strobe 4 input, See Table 1.
Digital Ground.
14
15
V
V
+5 V Supply Input.
DD
No Connection.
Reference input. Can be positive or
negative DC voltage or AC signal.
REF
CLR
Register B CLEAR input (active
LOW), can be used to asynchronously
reset Register B to 0000 0000 0000.
16
R
DAC Feedback Resistor.
FB
18
19
V
V
+5 V Supply Input.
DD
Reference input. Can be positive or
negative DC voltage or AC signal.
REF
20
R
DAC Feedback Resistor.
FB
Rev. 2.00
3