XRP7724
Quad Channel Digital PWM/PFM
Programmable Power Management System
PWM G
ENERATORS AND
O
SCILLATOR
Parameter
Switching Frequency (fsw)
Range
fsw Accuracy
CLOCK IN
Synchronization Frequency
CLOCK IN
Synchronization Frequency
Min.
105
–5
20
10
25.7
12.8
Typ.
Max.
1230
5
31
15.5
Units
kHz
%
MHz
MHz
When synchronizing to an external clock
(Range 1)
When synchronizing to an external clock
(Range 2)
Conditions
Steps defined in table
GPIO
S
5
Parameter
Input Pin Low Level
Input Pin High Level
Input Pin Leakage Current
Output Pin Low Level
Output Pin High Level
Output Pin High Level
Output Pin High-Z leakage
Current (GPIO pins only)
Maximum Sink Current
I/O Frequency
Note 5: 3.3V CMOS logic compatible, 5V tolerant.
2.4
3.3
3.6
10
1
30
2.0
1
0.4
Min.
Typ.
Max.
0.8
Units
V
V
µA
V
V
V
µA
mA
MHz
Open Drain Mode
I
SINK
= 1mA
I
SOURCE
= 1mA
I
SOURCE
= 0mA
Conditions
PSIO
S
6
Parameter
Input Pin Low Level
Input Pin High Level
Input Pin Leakage Current
Output Pin Low Level
Output Pin High Level
Output Pin High-Z leakage
Current (PSIO pins only)
I/O Frequency
2.0
1
0.4
15
10
5
Min.
Typ.
Max.
0.8
Units
V
V
µA
V
V
µA
MHz
I
SINK
= 3mA
Open Drain. External pull-up resistor to
user supply
Conditions
Note 6: 3.3V/5.0V CMOS logic compatible, maximum rating of 15.0V
© 2012 Exar Corporation
5/29
Rev. 1.0.1
EXAR [ EXAR CORPORATION ]
