CLC1005, CLC1015, CLC2005
Application Information
+Vs
6.8μF
General Description
The CLC1005, CLC1015, and CLC2005 are single supply,
general purpose, voltage-feedback amplifiers fabricated
on a complementary bipolar process using a patented
topography. They feature a rail-to-rail output stage and are
unity gain stable. Both gain bandwidth and slew rate are
insensitive to temperature.
0.1μF
+
Input
Output
-
RL
0.1μF
The common mode input range extends to 300mV below
ground and to 1.2V below V . Exceeding these values will
s
6.8μF
G = 1
not cause phase reversal. However, if the input voltage
exceeds the rails by more than 0.5V, the input ESD devices
will begin to conduct. The output will stay at the rail during
this overdrive condition.
-Vs
Figure 3: Unity Gain Circuit
+Vs
The design is short circuit protected and offers “soft”
saturation protection that improves recovery time.
6.8μF
+
Figures 1, 2, and 3 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations. Figure
4 shows the typical non-inverting gain circuit for single supply
applications.
0.1μF
In
+
Out
-
Rf
+Vs
Rg
6.8μF
Figure 4: Single Supply Non-Inverting Gain Circuit
0.1μF
Input
+
-
Output
At non-inverting gains other than G = +1, keep R below 1kΩ
g
to minimize peaking; thus for optimum response at a gain of
+2, a feedback resistor of 1kΩ is recommended. Figure 5
illustrates the CLC1005, CLC1015 and CLC2005 frequency
response with both 1kΩ and 2kΩ feedback resistors.
RL
0.1μF
6.8μF
Rf
Rg
G = 1 + (Rf/Rg)
-Vs
G = 2
Figure 1: Typical Non-Inverting Gain Circuit
R
V
= 2kΩ
= +5V
L
R = 2kΩ
f
s
+Vs
6.8μF
R = 1kΩ
f
R1
0.1μF
+
Output
Rg
Input
-
RL
0.1μF
Rf
1
10
100
Frequency (MHz)
6.8μF
G = - (Rf/Rg)
-Vs
Figure 5: Frequency Response vs. R
f
For optimum input offset
voltage set R1 = Rf || Rg
Figure 2: Typical Inverting Gain Circuit
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12 / 19
exar.com/CLC1005
Rev 2D
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