XRP7724
Quad Channel Digital PWM/PFM
Programmable Power Management System
BLOCK DIAGRAM
BST1
Channel 1
GH1
LX1
Feedback
ADC
Digital
PID
Hybrid
DPWM
VOUT1
Gate
Driver
GL1
PreScaler
1/2/4
Dead
Time
GL_RTN1
VCC
VREF
DAC
Current
ADC
SS & PD
VCCD1-2
VOUT3
VOUT3
VOUT4
Channel 2
Channel 3
VCCD3-4
Channel 4
Vout1
Vout2
Vout3
Vout4
Vtj
4uA
ENABLE
GPIO 0-1
Internal
POR
MUX
NVM
(FLASH)
GPIO
Sequencing
BFB
VCC
Fault
Handling
OTP
UVLO
OCP
PSIO 0-2
SDA,SCL
PWR
Good
Configuration
Registers
PSIO
I2C
LDO5
OVP
5V LDO
LOGIC
CLOCK
LDO3_3
3.3V LDO
Fig. 2: XRP7724 Block Diagram
LDO BLOCK DIAGRAM
VCCD3-4 VCCD1-2
LDO5
DVDD
AVDD
1.8V
Regulator
Gate Drivers
5V LDO
1.8V Analog
1.8V Digital
5V Blocks
PSIO
3.3V Regulator
3.3V GPIO
VCC
LDO3_3
3.3V LDO
+
-
4.75V – 4.9V
V5EXT
Fig. 3: XRP7724 LDO Block Diagram
7/29
© 2012 Exar Corporation
Rev. 1.0.1
EXAR [ EXAR CORPORATION ]
