7.5 Advanced Error Reporting Capability Registers
The Advanced Error Reporting Capability registers is an optional extended capability that
may be implemented by PCI Express devices supporting advanced error control and
reporting.
ENH_CAP_ HEAD[31:0]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
UNC_ERR_STAT[31:0]
9
9
9
9
9
9
9
8
8
8
8
8
8
8
7
7
7
7
7
7
7
6
6
6
6
6
6
6
5
5
5
5
5
5
5
4
4
4
4
4
4
4
3
3
3
3
3
3
3
2
2
2
2
2
2
2
1
1
1
1
1
1
1
0
0
0
0
0
0
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
UNC_ERR_MASK[31:0]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
UNC_ERR_SEV[31:0]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
COR_ERR_STAT[31:0]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
COR_ERR_MASK[31:0]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
ERR_CAP_CTL[31:0]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
HEAD_LOG[127:96]
127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100
HEAD_LOG[95:64]
99 98 97 96
95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64
HEAD_LOG[63:32]
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
820x – Data Sheet, DS-0157-D
Page235
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EXAR [ EXAR CORPORATION ]
