7.1.11
Base Address Register 0, 1
The Base Address 0 register provides the 820x base address on a 4KB boundary and some
memory configuration parameters. This address in memory space is where the standard
820x register set will reside and be accessed. For 32-bit systems, the base address is set
using only BAR 0. For 64-bit systems, the base address is set using both BAR 0 and BAR 1.
Offset
x‘0010’
BASE_ADR[56:25]
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
BASE_ADR[24:0]
Reserved
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Field Name
Description
820x
Bits
Type
Value
BASE_ADR[56:0]
Base Address.
[63:32] Only used for 64-bit 4KB
memory base address
63:7
RW
0
[31:7] Indicates 32-bit 4KB memory
base address
Reserved
6:4
3
RO
RO
0
0
Reserved
PRE_FTCH
Prefetchable memory.
0
1
Non-Prefetchable memory
Prefetchable memory
DEC_TYP
Decoder Type.
00 32 bit decoder; locate memory
00 for a
32-bit
system;
10 for a
64-bit
anywhere in lower 4GB; use only
BAR0
2:1
RW
RO
01 Reserved
10 64-bit decoder; locate memory
anywhere in 264 memory space;
uses BAR0 and BAR1
system
11 Reserved
MEM_IND
Memory Space Indicator.
x0 Base Address Register0 is a
memory address decoder
0
0
x1 Base Address Register0 is an IO
address decoder
820x – Data Sheet, DS-0157-D
Page211
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