7.1.3
Command Register
The Command register is used to enable or disable The I/O space, Memory space, Bus
Master, Parity Error Response, System Errors, and Interrupts.
Offset
x‘0004’
Reserved
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Field Name
Description
820x
Bits
Type
Value
Reserved
INT_DIS
15:11
RO
0
Reserved
Interrupt Disable.
Controls whether the 820x can
generate INTx interrupt messages.
0
1
820x enabled to generate INTx
interrupt messages.
820x's disabled to generate INTx
interrupt messages is disabled.
If the 820x had already transmitted an
Assert_INTx emulation interrupt
10
RW
0
messages and this bit is then set, the
820x must transmit a corresponding
Deassert_INTx message for each
previously transmitted assert message
Note that INTx emulation interrupt
messages forwarded by Root and
Switch Ports from devices downstream
of the Root or Switch Port are not
affected by this bit.
Reserved
9
8
7
RO
RW
RO
0
0
0
Reserved
SERR#_EN
System Error Enable.
This active low bit enables or disables
the reporting of errors detected by the
820x to the Root Complex.
0
820x may send detected errors to
the Root Complex
1
820x may not send detected errors
to the Root Complex
Reserved
Reserved
820x – Data Sheet, DS-0157-D
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