7 PCIe Configuration Register Definition
This section describes the 820x PCIe configuration registers. The registers are mapped into
4K bytes of PCIe configuration space that can be accessed through the PCIe bus. The offset
values in this section are given in hex.
The host should not read/write to/from reserved registers. If the host writes to a reserved
register, the write will be ignored by the 820x. Likewise, if the host reads a reserved
register, the return value will be all zeros.
Table 7-1 lists the register types definitions used to describe the PCIe configuration
registers in this chapter. Fields marked as 'Read Only' usually indicate the 820x capability
and may not be altered by host; fields marked as 'Read/Write' may be altered by the host
(usually BIOS or OS) for special purposes.
Table 7-1. Register Type Definitions
Register Type
Description
RO
Read only.
Register bits are read-only and cannot be altered by software.
Sticky - Read only.
ROS
Registers are read-only and cannot be altered by software. Registers are
not initialized or modified by hot reset.
RW
Read/Write.
Register bits are read-write and may be either set or cleared by software to
the desired state.
RW1C
RWS
Read-only status, Write-1-to-clear status.
Register bits indicate status when read, a set bit indicating a status event
may be cleared by writing a 1. Writing a 0 to RW1C bits has no effect.
Sticky - Read-Write.
Registers are read-write and may be either set or cleared by software to the
desired state. Bits are not initialized or modified by hot reset.
HWINIT
Hardware Initialized.
Register bits are initialized by firmware or hardware mechanisms such as
pin strapping or serial EEPROM. Bits are read-only after initialization and
can only be reset with a power on reset.
Figure 7-1 illustrates the 820x PCIe Configuration registers.
820x – Data Sheet, DS-0157-D
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