6.6.4
GPIO Interrupt Enable Register
The GPIO Interrupt Enable register allows each GPIO bit to be independently configured as
an interrupt. By default, using the GPIO ports as interrupts is disabled. If a one is written
to a bit of this register, that GPIO bit will become an interrupt. Otherwise, it operates as a
normal GPIO port. Interrupts will be disabled if the corresponding Data Direction register bit
is set to Output or if its Mode is set to Hardware.
Type:
Offset
Read/Write
x‘0860’
Reserved
GPIO_INT_EN[15:0]
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Field Name
Description
Bits
Reset
Reserved
31:16
0
Reserved.
GPIO_INT_EN
[15:0]
GPIO Interrupt Enable.
Each GPIO bit can be configured as:
15:0
0
0
1
Normal GPIO port (default)
Interrupt
820x – Data Sheet, DS-0157-D
Page181
Hifn Confidential
EXAR [ EXAR CORPORATION ]
