Table 9-2. 4450 pin list (numeric) - second half
H18
J1
h0_bus0[4]
dpu_gpio[4]
dpu_gpio[3]
vdde
L2
vss
N4
jtag_tdo
R6
vss
U8
n0_bus0_p
n1_bus0_p
serdes_rref
h0_bus0_p
h1_bus0_p
rmii_vdd
L3
esc_gpio[4]
esc_gpio[5]
vdd_reserved
N5
jtag_tms
R7
srefclk_p
vss
U9
J2
L4
N6
testmode
n1_bus1[1]
n0_bus1_n
n1_bus1_n
vtth_serdes
h0_bus1_n
h1_bus1_n
h1_ctrl_1
h1_clk_1
h1_bus1[5]
h1_bus1[7]
h1_bus1[6]
vss
R8
U10
U11
U12
U13
U14
U15
U16
U17
U18
V1
J3
L5
N7
R9
vss
J4
dpu_gpio[2]
dpu_gpio[1]
dpu_gpio[5]
dpu_gpio[0]
vddi
L6
esc_gpio[2]
esc_gpio[3]
vddi
N8
R10
R11
R12
R13
R14
R15
R16
R17
R18
T1
vss
J5
L7
N9
vss
rmii_bus0[2]
rmii_bus1[1]
J6
L8
N10
N11
N12
N13
N14
N15
N16
N17
N18
P1
vss
J7
L9
vss
rmii_ref_clk
h1_bus0[6]
vddh
J8
L10
L11
L12
L13
L14
L15
L16
L17
L18
M1
M2
M3
M4
M5
M6
M7
M8
M9
vss
h1_bus0[8]
vddh
J9
vss
vss
J10
J11
J12
J13
J14
J15
J16
J17
J18
K1
vss
vddi
h1_bus0[3]
h1_bus0[1]
vss
h1_bus0[2]
vss
vss
h0_bus1[2]
vss
vddi
V2
n1_ctrl_0
n1_clk_0
n1_ctrl_1
n1_bus1[2]
n1_bus1[3]
vddn
h0_clk_2
h0_bus1[9]
vddh
h0_bus1[0]
h0_bus1[1]
h1_bus1[0]
vref_host
esc_gpio[7]
vdda_pll
vdde
vref_netw
n0_bus1[1]
n0_bus1[0]
n1_bus0[0]
n1_bus0[3]
vddn
V3
T2
V4
n0_ctrl_0
n0_bus0[1]
n0_clk_0
n0_bus0[0]
n0_ctrl_1
n0_clk_1
vddn
T3
V5
h0_bus1[8]
vddh
P2
T4
V6
P3
T5
V7
h0_bus1[7]
esc_gpio[0]
net_config[1]
net_config[0]
P4
T6
V8
n0_bus0_n
n1_bus0_n
vss
P5
T7
srefclk_n
vdds
V9
K2
prefclk
P6
T8
V10
V11
V12
V13
V14
V15
V16
V17
V18
K3
pll_bypass
jtag_tdi
pll_mode[1]
vddi
P7
T9
vdds
h0_bus0_n
h1_bus0_n
vss
vdda_serdes
K4
por_n
P8
n0_bus1_p
n1_bus1_p
vttn_serdes
h0_bus1_p
h1_bus1_p
h1_bus0[5]
vss
T10
T11
T12
T13
T14
T15
T16
T17
T18
U1
K5
dpu_gpio[7]
esc_gpio[1]
dpu_gpio[6]
vddi
P9
vdds
rmii_bus0[0]
rmii_bus1[0]
K6
P10
P11
P12
P13
P14
P15
P16
P17
P18
R1
vdds
rmii_bus0[1]
rmii_bus1[2]
K7
vddi
K8
M10 vddi
h1_bus0[9]
h1_clk_0
vss
K9
vss
M11 vddi
h1_bus0[7]
h1_ctrl_0
K10
K11
K12
K13
K14
K15
K16
vss
M12 vss
vss
M13 h1_bus1[1]
M14 h1_bus1[2]
M15 vddh
h1_bus1[9]
h1_clk_2
vddh
h1_bus0[4]
h1_bus0[0]
n0_bus1[2]
vddn
h0_bus1[6]
h0_bus1[5]
h0_bus1[3]
h0_clk_1
h0_bus1[4]
M16 h1_bus1[4]
M17 vddh
h1_bus1[8]
n0_bus0[2]
vss
U2
U3
n0_bus1[3]
n1_bus0[1]
M18 h1_bus1[3]
R2
U4
4450 – Data Sheet, DS-0131-06
Page83
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