EUA6019
Operation
Input Resistance
SE/BTL
Each gain setting is achieved by varying the input
resistance of the amplifier, which can range from its
smallest value to over 6 times that value. As a results, if a
single capacitor is used in the input high-pass filter, the –3
dB or cut-off frequency will also change by over 6 times.
The ability of the EUA6019 to easily switch between BTL
and SE modes is one of its most important cost saving
features. This feature eliminates the requirement for an
additional headphone amplifier in applications where
internal stereo speakers are driven in BTL mode but
external headphone or speakers must be accommodated.
Internal to the EUA6019 , two separate amplifiers drive
OUT+ and OUT- .The
input (terminal 15)
SE/BTL
control the operation of the follower amplifier that drives
LOUT- and ROUT- (terminals and 16).When
is held low, the amplifier is on and the EUA6019
9
SE/BTL
is in the BTL mode. When
is held high, the
SE/BTL
OUT- amplifiers are in a high output impedance state,
which configures the EUA6019 as an SE driver from
LOUT+ and ROUT+ (terminals 4 and 21). IDD is reduced
by approximately one-half in SE mode. Control of the
Figure 31. Input Resistor
The-3dB frequency can be calculated using equation
input can be from a logic-level CMOS source or,
SE/BTL
3:
more typically, from a resistor divider network as shown
in Figure 30.
1
2π C (R || R )
f-3dB
=
-------------- (3)
i
If the filter must be more accurate, the value of the
capacitor should be increased while the value of the resistor
to ground should be decreased. In addition, the order of the
filter could be increased.
Input Capacitor, Ci
In the typical application an input capacitor, Ci, is required
to allow the amplifier to bias the input signal to the proper
dc level for optimum operation. In this case, Ci and the input
impedance of the amplifier, Zi, from a high-pass filter with
the corner frequency determined in equation 4.
Figure 30. Resistor divider Network circuit 2
1
f
=
-----------------(4)
c(highpass)
Using a readily available 1/8-in. (3.5mm) stereo headphone
jack, the control switch is closed when no plug is inserted.
When closed the 100-kΩ /1-kΩ divider pulls the
2π Z C
i
i
input low. When a plug is inserted, the 1-kΩ
SE/BTL
resistor is disconnected and the
input is pulled
SE/BTL
high. When the input goes high, the OUT- amplifier is shut
down causing the speaker to mute(virtually open-circuits
the speaker).The OUT+ amplifier then drives through the
output capacitor (CO) into the headphone jack.
The value of Ci is important to consider as it directly affects
the bass (low frequency) performance of the circuit.
Consider the example where Zi is 70kΩ and the
specification calls for a flat bass response down to 40Hz.
Equation 2 is reconfigured as equation 5.
1
Ci =
----------------------------(5 )
2π Z fC
i
DS6019 Ver 1.1 May. 2007
17
EUTECH [ EUTECH MICROELECTRONICS INC ]
