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EM6GC16EWKE-10H 参数 Datasheet PDF下载

EM6GC16EWKE-10H图片预览
型号: EM6GC16EWKE-10H
PDF下载: 下载PDF文件 查看货源
内容描述: [64M x 16 bit DDR3 Synchronous DRAM (SDRAM)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 85 页 / 835 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
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EtronTech  
EM6GC16EWKE  
The MRS command to Non-MRS command delay, tMOD, is require for the DRAM to update the features except  
DLL reset, and is the minimum time required from an MRS command to a non-MRS command excluding NOP and  
DES shown in Figure of tMOD timing.  
Figure 7. tMOD timing  
T0  
T1  
T2  
Ta0  
Ta1  
Ta2  
Ta3  
Ta4  
Tb0  
Tb1  
Tb2  
CK#  
CK  
NOP/DES  
VALID  
NOP/DES  
VALID  
NOP/DES  
VALID  
NOP/DES  
VALID  
NOP/DES  
VALID  
VALID  
VALID  
VALID  
VALID  
VALID  
VALID  
MRS  
VALID  
VALID  
VALID  
VALID  
COMMAND  
ADDRESS  
VALID  
CKE  
Old Settings  
Updating Settings  
tMOD  
New Settings  
Settings  
RTT_Nom ENABLED prior and/or after MRS command  
ODTLoff + 1  
VALID  
VALID  
VALID  
VALID  
ODT  
ODT  
RTT_Nom DISABLED prior and after MRS command  
VALID VALID VALID  
VALID  
VALID  
VALID  
VALID  
VALID  
VALID  
VALID  
TIME BREAK  
Don't Care  
The mode register contents can be changed using the same command and timing requirements during normal  
operation as long as the DRAM is in idle state, i.e., all banks are in the precharged state with tRP satisfied, all data  
bursts are completed and CKE is high prior to writing into the mode register. The mode registers are divided into  
various fields depending on the functionality and/or modes.  
Rev. 1.0  
12  
Jul. /2015