EtronTech
D.C. Characteristics
(V
DD
=2.5
±
5%, T
A
= 0~70
°C)
8Mx32 DDR SDRAM
EM6AA320-XXMS
3.6
4
Max
350
5
6
Parameter & Test Condition
OPERATING CURRENT :
One bank; Active-Precharge;
t
RC
=t
RC
(min); t
CK
=t
CK
(min); DQ,DM and DQS inputs
changing once per clock cycle; Address and control
inputs changing once every two clock cycles.
OPERATING CURRENT :
One bank; Active-Read-
Precharge; BL=4; CL=4; tRCDRD=4*t
CK
; t
RC
=t
RC
(min);
t
CK
=t
CK
(min); lout=0mA; Address and control inputs
changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT:
All banks idle; power-down mode; t
CK
=t
CK
(min);
CKE=LOW
IDLE STANDLY CURRENT :
CKE = HIGH;
CS#=HIGH(DESELECT); All banks idle; t
CK
=t
CK
(min);
Address and control inputs changing once per clock
cycle; V
IN
=V
REF
for DQ, DQS and DM
ACTIVE POWER-DOWN STANDBY CURRENT :
one
bank active; power-down mode; CKE=LOW;
t
CK
=t
CK
(min)
ACTIVE STANDBY CURRENT :
CS#=HIGH;CKE=HIGH; one bank active ;
t
RC
=t
RC
(max);t
CK
=t
CK
(min);Address and control inputs
changing once per clock cycle; DQ,DQS,and DM inputs
changing twice per clock cycle
OPERATING CURRENT BURST READ :
BL=2; READS;
Continuous burst; one bank active; Address and control
inputs changing once per clock cycle; t
CK
=t
CK
(min);
lout=0mA;50% of data changing on every transfer
OPERATING CURRENT BURST Write :
BL=2;
WRITES; Continuous Burst ;one bank active; address
and control inputs changing once per clock cycle;
t
CK
=t
CK
(min); DQ,DQS,and DM changing twice per clock
cycle; 50% of data changing on every transfer
AUTO REFRESH CURRENT :
t
RC
=t
RFC
(min);
t
CK
=t
CK
(min)
SELF REFRESH CURRENT:
Sell Refresh Mode ;
CKE<=0.2V;t
CK
=t
CK
(min)
BURST OPERATING CURRENT 4 bank operation:
Four bank interleaving READs; BL=4;with Auto
Precharge; t
RC
=t
RC
(min); t
CK
=t
CK
(min); Address and
control inputschang only during Active, READ , or WRITE
command
Symbol
3.3
Unit
IDD0
500
460
310
280
mA
IDD1
600
540
480
440
400
mA
IDD2P
120
120
100
80
80
mA
IDD2N
210
200
175
170
170
mA
IDD3P
120
120
100
80
80
mA
IDD3N
300
280
260
240
240
mA
IDD4R
640
610
580
550
520
mA
IDD4W
550
525
500
480
460
mA
IDD5
IDD6
750
8
720
8
650
5
610
5
580
5
mA
mA
IDD7
1100 1050 1000 950
900
mA
Note:
1. Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device.
2. All voltages are referenced to V
SS
.
3. These parameters depend on the cycle rate and these values are measured by the cycle rate
under the minimum value of t
CK
and t
RC
. Input signals are changed one time during t
CK
.
4. Power-up sequence is described in previous page.
9
Rev 0.7
May. 2006