EtronTech
CK
t
RCDRD
t
RAS
t
RC
CMD
ACT
RD
PRE
8Mx32 DDR SDRAM
EM6AA320-XXMS
Figure 3. Bank Activate Read or Write Command Timing
t
RCDWR
t
RP
t
RRD
ACT
ACT
WR
t
RAS
t
RC
PRE
ACT
t
RP
ROW ADR Active
A0-11
RA
ROW ADR
BA0-1
BA
Bank ADR
CA
Column ADR
BA
Percharge
RA
RA
CA
RA
BA
BA
BA
BA
BA
BA
Figure 4. Burst Stop for Read (CAS Letancy = 5, Burst Length = 4)
CK#
CK
CMD
RD
BST
Burst Stop for CAS Latency = 5
A0-11,
BA0-1
DQS
Valid
After 1 x CK Command can be active
1x CK
CMD
0
1
2
3
4
5
6
7
8
DQ
DQ0
DQ1
Figure 5. Read with Auto Precharge (CAS Letancy = 5, Burst Length = 4)
CK#
CK
Read with Auto Precharge
CMD
RDA
CAS Latency = 5
A0-11,
BA0-1
DQS
Begin of Auto Precharge
DQ
DQ0
DQ1
DQ2
DQ3
Valid
t
RP
Valid
Bank can be Active after Auto Precharge
ACT
0
1
2
3
4
5
6
13
Rev 0.7
May. 2006
ETRON [ ETRON TECHNOLOGY, INC. ]
