EtronTech
EM6AA160
Figure 32. Initialize and Mode Register Sets
VDD
VDDQ
tVDT>=0
VTT
(system*)
tCK
VREF
tCH tCL
CK
CK
tIS tIH
LVCMOS LOW LEVEL
CKE
tIS tIH
EMRS
AR
MRS
COMMAND
DM
NOP
PRE
MRS
PRE
AR
ACT
tIS tIH
A0-A9,
A11,A12
CODE
CODE
CODE
CODE
CODE
RA
RA
BA
t
IS tIH
ALL BANKS
ALL BANKS
CODE
A10
tIS tIH
tIS tIH
tIS tIH
BA0=H
BA1=L
BA0=L
BA1=L
BA0=L
BA1=L
BA0,BA1
High-Z
DQS
DQ
High-Z
**tMRD
**tMRD
tRFC
tRFC
**tMRD
tRP
200 cycles of CK**
T=200µs
Extended mode
Register set
Load Mode
Register,
(with A8=L)
Power-up:
Load Mode
VDD and
Register,
CLK stable
Reset DLL (with A8=H)
*=VTT is not applied directly to the device, however tVTD must be greater than or equal to zero to avoid device latch-up.
** = tMRD is required before any command can be applied, and 200 cycles of CK are required before any executable
command can be applied the two auto Refresh commands may be moved to follow the first MRS but precede the second
PRECHARGE ALL command.
Don’t Care
Etron Confidential
51
Rev. 1.3
Mar. /2014
ETRON [ ETRON TECHNOLOGY, INC. ]
