欢迎访问ic37.com |
会员登录 免费注册
发布采购

EM68916CWQA-37H 参数 Datasheet PDF下载

EM68916CWQA-37H图片预览
型号: EM68916CWQA-37H
PDF下载: 下载PDF文件 查看货源
内容描述: 8M ×16位DDRII同步DRAM ( SDRAM ) [8M x 16 bit DDRII Synchronous DRAM (SDRAM)]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 59 页 / 1180 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
 浏览型号EM68916CWQA-37H的Datasheet PDF文件第15页浏览型号EM68916CWQA-37H的Datasheet PDF文件第16页浏览型号EM68916CWQA-37H的Datasheet PDF文件第17页浏览型号EM68916CWQA-37H的Datasheet PDF文件第18页浏览型号EM68916CWQA-37H的Datasheet PDF文件第20页浏览型号EM68916CWQA-37H的Datasheet PDF文件第21页浏览型号EM68916CWQA-37H的Datasheet PDF文件第22页浏览型号EM68916CWQA-37H的Datasheet PDF文件第23页  
EtronTech  
EM68916CWQA  
z Burst read with auto precharge  
If A10 is HIGH when a Read Command is issued, the Read with Auto-Precharge function is engaged. The  
DDR2 SDRAM starts an Auto-Precharge operation on the rising edge which is (AL + BL/2) cycles later from  
the Read with AP command if tRAS(min) and tRTP are satisfied. If tRAS(min) is not satisfied at the edge, the  
start point of Auto-Precharge operation will be delayed until tRAS(min) is satisfied. If tRTP(min) is not satisfied  
at the edge, the start point of Auto-precharge operation will be delayed until tRTP(min) is satisfied.  
In case the internal precharge is pushed out by tRTP, tRP starts at the point where the internal precharge  
happens (not at the next rising clock edge after this event). So for BL = 4 the minimum time from Read with  
Auto-Precharge to the next Activate command becomes AL + tRTP + tRP. For BL = 8 the time from Read with  
Auto-Precharge to the next Activate command is AL + 2 + tRTP + tRP. Note that both parameters tRTP and tRP  
have to be rounded up to the next integer value. In any event internal precharge does not start earlier than  
two clocks after the last 4-bit prefetch.  
A new bank active (command) may be issued to the same bank if the following two conditions are satisfied  
simultaneously:  
(1) The RAS# precharge time (tRP) has been satisfied from the clock at which the Auto-Precharge begins.  
(2) The RAS# cycle time (tRC) from the previous bank activation has been satisfied.  
z Burst write with auto precharge  
If A10 is HIGH when a Write Command is issued, the Write with Auto-Precharge function is engaged. The  
DDR2 SDRAM automatically begins precharge operation after the completion of the burst write plus Write  
recovery time (tWR). The bank undergoing auto-precharge from the completion of the write burst may be  
reactivated if the following two conditions are satisfied.  
(1) The data-in to bank activate delay time (WR + tRP) has been satisfied.  
(2) The RAS# cycle time (tRC) from the previous bank activation has been satisfied.  
Table 14.Precharge &Auto Precharge Clariification  
Minimum Delay between “From  
Command” to “To Command”  
From Command  
Read  
To Command  
Unit Notes  
Precharge (to same Bank as Read)  
Precharge All  
Precharge (to same Bank as Read w/AP)  
Precharge All  
Precharge (to same Bank as Write)  
Precharge All  
Precharge (to same Bank as Write w/AP)  
Precharge All  
AL+BL/2+max(RTP,2)-2  
AL+BL/2+max(RTP,2)-2  
AL+BL/2+max(RTP,2)-2  
AL+BL/2+max(RTP,2)-2  
tCK  
tCK  
1,2  
1,2  
2
Read w/AP  
Write  
WL+BL/2+tWR  
WL+BL/2+tWR  
WL+BL/2+tWR  
WL+BL/2+tWR  
tCK  
tCK  
tCK  
tCK  
Write w/AP  
Precharge  
Precharge All  
2
Precharge (to same Bank as Precharge)  
Precharge All  
1
1
1
1
2
Precharge  
Precharge All  
2
NOTE 1: RTP [cycles] =RU {tRTP [ns]/tCK (avg) [ns]}, where RU stands for round up.  
NOTE 2: For a given bank, the precharge period should be counted from the latest precharge command, either  
one bank precharge or precharge all, issued to that bank.The prechrage period is satisfied after tRP or tRPall(=tRP  
for 4 bank device) depending on the latest precharge command issued to that bank.  
Etron Confidential  
19  
Rev. 1.1  
Apr. 2009  
 复制成功!