EtronTech
EM63A165
T0
T 1
T2
T3
T4
T5
T6
T7
T8
CLK
NOP
NOP
NOP
COMMAND
NOP
WRITE A
READ B
NOP
NOP
NOP
CAS# latency=2
DOUT B
DOUT B
DIN A
0
DOUT B
DOUT B
don't care
don't care
2
3
0
1
t
, DQ's
CK2
CAS# latency=3
, DQ's
DOUT B
DOUT B
DOUT B
DOUT B
3
DIN A
0
don't care
t
0
1
2
CK3
Input data must beremovedfrom the DQ's at least one clock
cycle before the Readdata appears on the outputs to avoid
data contention.
Input data for the write is masked.
Write Interrupted by a Read
(Burst Length = 4, CAS# Latency = 2, 3)
10
Rev 1.1 Apr. 2007