EM639325
EtronTech
Figure 24. Self Refresh Entry & Exit Cycle
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19
CLK
CKE
*Note 2
*Note 8
tXSR
*Note 5
*Note 1
*Note 3,4
tPDE
tIS
tIH
*Note 6
tIS
*Note 7
CS#
RAS#
CAS#
WE#
*Note 9
BA0,1
A10
A0-A9,
A11
DQM
DQ
Hi-Z
Hi-Z
Self Refresh Exit
Auto Refresh
Self Refresh Entry
Don’t Care
Note: To Enter SelfRefresh Mode
1. CS#, RAS# & CAS# with CKE should be low at the same clock cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don't care except for CKE.
3. The device remains in SelfRefresh mode as long as CKE stays "low".
4. Once the device enters SelfRefresh mode, minimum tRAS is required before exit from SelfRefresh.
To Exit SelfRefresh Mode
5. System clock restart and be stable before returning CKE high.
6. Enable CKE and CKE should be set high for valid setup time and hold time.
7. CS# starts from high.
8. Minimum tXSR is required after CKE going high to complete SelfRefresh exit.
9. 4096 cycles of burst AutoRefresh is required before SelfRefresh entry and after SelfRefresh exit if the
system uses burst refresh.
Rev. 2.1
26
Aug. /2015
ETRON [ ETRON TECHNOLOGY, INC. ]
