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EM638325TS-5/-5G 参数 Datasheet PDF下载

EM638325TS-5/-5G图片预览
型号: EM638325TS-5/-5G
PDF下载: 下载PDF文件 查看货源
内容描述: 2M ×32同步DRAM ( SDRAM ) [2M x 32 Synchronous DRAM (SDRAM)]
分类和应用: 动态存储器
文件页数/大小: 72 页 / 761 K
品牌: ETRON [ ETRON TECHNOLOGY, INC. ]
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EtronTech  
EM638325  
2Mega x 32 SDRAM  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
T8  
CLK  
NOP  
NOP  
NOP  
COMMAND  
NOP  
WRITE A  
WRITE B  
NOP  
NOP  
NOP  
1 Clk Interval  
DIN DIN B  
A
DIN B  
DIN B  
DIN B  
3
DQ's  
0
0
1
2
Write Interrupted by a Write (Burst Length = 4, CAS# Latency = 1, 2, 3)  
The Read command that interrupts a write burst without auto precharge function should be  
issued one cycle after the clock edge in which the last data-in element is registered. In order to avoid  
data contention, input data must be removed from the DQs at least one clock cycle before the first  
read data appears on the outputs (refer to the following figure). Once the Read command is  
registered, the data inputs will be ignored and writes will not be executed.  
T0  
T 1  
T2  
T3  
T4  
T5  
T6  
T7  
T8  
CLK  
NOP  
NOP  
NOP  
COMMAND  
CAS# latency=2  
NOP  
WRITE A  
READ B  
don't care  
don't care  
NOP  
NOP  
NOP  
DOUT B  
DOUT B  
DIN A  
0
DOUT B  
DOUT B  
2
3
0
1
t
, DQ's  
CK2  
CAS# latency=3  
, DQ's  
DOUT B  
DOUT B  
DOUT B  
DOUT B  
3
DIN A  
0
don't care  
t
0
1
2
CK3  
Input data must be removed from the DQ's at least one clock  
cycle before the Read data appears on the outputs to avoid  
data contention.  
Input data for the write is masked.  
Write Interrupted by a Read (Burst Length = 4, CAS# Latency = 2, 3)  
The BankPrecharge/PrechargeAll command that interrupts a write burst without the auto  
m
precharge function should be issued cycles after the clock edge in which the last data-in element  
m
is registered, where  
equals tWR/tCK rounded up to the next whole number. In addition, the DQM  
signals must be used to mask input data, starting with the clock edge following the last data-in  
element and ending with the clock edge on which the BankPrecharge/PrechargeAll command is  
entered (refer to the following figure).  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
CLK  
DQM  
t
RP  
COMMAND  
WRITE  
Precharge  
BANK (S)  
NOP  
NOP  
Activate  
ROW  
NOP  
NOP  
BANK  
COL n  
ADDRESS  
DQ  
t
WR  
DIN  
n
DIN  
n + 1  
: don't care  
Note:  
The DQMs can remain low in this example if the length of the write burst is 1 or 2.  
Write to Precharge  
Preliminary  
10  
Rev 1.4  
Oct. 2005