EtronTech
EM638325
2Mega x 32 SDRAM
Recommended D.C. Operating Conditions (VDD = 3.3V ± 0.3V, Ta = 0~70°C)
- 5/5.5/6/7/8/10
Max.
Note
Description/Test condition
Operating Current
tRC ³ tRC(min), Outputs Open, Input
Symbol
Unit
1 bank
operation
ICC1
200/190/180/155/135/120
3
signal one transition per one cycle
Precharge Standby Current in power down mode
tCK = 15ns, CKE £ VIL(max)
Precharge Standby Current in power down mode
tCK = ¥ , CKE £ VIL(max)
Precharge Standby Current in non-power down mode
tCK = 15ns, CS# ³ VIH(min), CKE ³ VIH
Input signals are changed once during 30ns.
Precharge Standby Current in non-power down mode
tCK = ¥ , CLK £ VIL(max), CKE ³ VIH
Active Standby Current in power down mode
CKE £ VIL(max), tCK = 15ns
ICC2P
3
3
3
3
ICC2PS
ICC2N
25
ICC2NS
ICC3P
ICC3PS
ICC3N
ICC3NS
ICC4
15
5
mA
3
3
Active Standby Current in power down mode
CKE & CLK £ VIL(max), tCK = ¥
5
Active Standby Current in non-power down mode
CKE ³ VIH(min), CS# ³ VIH(min), tCK = 15ns
Active Standby Current in non-power down mode
CKE ³ VIH(min), CLK £ VIL(max), tCK = ¥
Operating Current (Burst mode)
tCK =tCK(min), Outputs Open, Multi-bank interleave
Refresh Current
tRC ³ TrC(min)
Self Refresh Current
40
30
225/215//200/180/150/130
260/240/220/210/190/180
2
3, 4
3
ICC5
ICC6
CKE £ 0.2V
Parameter
Description
Min.
Max.
Unit
Note
IIL
Input Leakage Current
( 0V VIN VDD, All other pins not under test = 0V )
- 1.5
1.5
mA
V
≦
≦
VOH
VOL
LVTTL Output "H" Level Voltage
( IOUT = -2mA )
2.4
-
LVTTL Output "L" Level Voltage
( IOUT = 2mA )
0.4
V
-
Preliminary
17
Rev 1.4
Oct. 2005