EtronTech
1Mega x 32 SGRAM
EM637327
DQM0 - Input
Data Input/Output Mask:
DQM0-DQM3 are byte specific, nonpersistent I/O buffer
DQM3
controls. The I/O buffers are placed in a high-z state when DQM is sampled HIGH. Input
data is masked when DQM is sampled HIGH during a write cycle. Output data is masked
(two-clock latency) when DQM is sampled HIGH during a read cycle. DQM3 masks DQ31-
DQ24, DQM2 masks DQ23-DQ16, DQM1 masks DQ15-DQ8, and DQM0 masks DQ7-
DQ0.
DQ0- Input/
Data I/O:
The DQ0-31 input and output data are synchronized with the positive edges of
DQ31 Output CLK. The I/Os are byte-maskable during Reads and Writes. The DQs also serve as
column/byte mask inputs during Block Writes.
NC
V
DDQ
V
SSQ
V
DD
V
SS
-
No Connect:
These pins should be left unconnected.
Supply
DQ Power:
Provide isolated power to DQs for improved noise immunity.
Supply
DQ Ground:
Provide isolated ground to DQs for improved noise immunity.
Supply
Power Supply:
+3.3V±0.3V
Supply
Ground
Preliminary
4
August 1999
ETRON [ ETRON TECHNOLOGY, INC. ]
