EtronTech
DQ
Inputs
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Column Address DQ Planes
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Controlled
0~7
0~7
0~7
0~7
0~7
0~7
0~7
0~7
8~15
8~15
8~15
8~15
8~15
8~15
8~15
8~15
DQ
Inputs
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
EM636327
Column Address DQ Planes
Controlled
16~23
16~23
16~23
16~23
16~23
16~23
16~23
16~23
24~31
24~31
24~31
24~31
24~31
24~31
24~31
24~31
A block write access requires a time period of t
BWC
to execute, so in general, there should be
m
NOP cycles(m equals (t
BWC
- t
CK
)/t
CK
rounded up to the next whole number), after the Block Write
command. However, BankActivate or BankPrecharge commands to the other bank are allowed.
When following a Block Write with a BankPrecharge or PrechargeAll command to the same bank,
t
BPL
must be met.
9
Write and AutoPrecharge command (refer to the following figure)
(RAS# = "H", CAS# = "L", WE# = "L", DSF = "L", BS = Bank, A9 = "H", A0-A7 = Column Address)
The Write and AutoPrecharge command performs the precharge operation automatically after
the write operation. Once this command is given, any subsequent command can not occur within a
time delay of {(burst length -1) + t
WR
+ t
RP
(min.)}. At full-page burst, only the write operation is
performed in this command and the auto precharge function is ignored.
T0
CLK
Bank A
Activate
Write A
AutoPrecharge
T1
T2
T3
T4
T5
T6
T7
T8
COM MAND
NOP
NOP
NOP
NOP
NOP
NOP
NOP
t
DAL
CAS# latency=1
tCK1, DQ's
CAS# latency=2
tCK2, DQ's
CAS# latency=3
tCK3, DQ's
DIN A0
DIN A1
DIN A0
DIN A1
*
*
*
*
t
DAL
t
DAL
DIN A0
DIN A1
t
DAL
=
t
WR
+
t
RP
Begin AutoPrecharge
Bank can be reactivated at completion of
t
DAL
Burst Write with Auto-Precharge
(Burst Length = 2, CAS# Latency = 1, 2, 3)
Preliminary
13
December
1998