EtronTech
Write Cycle4
(UB#, LB# Controlled)(See Note 4)
tWC
EM562081
Addres s
tWP
tWR
W E#
t CW
C E1#
C E2
t CW
t W HZ
D OU T
tL Z
t DS
t DH
D IN
( S e e N ot e 5 )
V A L ID DA TA I N
Note:
(1) WE# remains HIGH for the read cycle.
(2) If CE1# goes LOW (or CE2 goes HIGH) with or after WE# goes LOW, the outputs will remain at
high impedance.
(3) If CE1# goes HIGH (or CE2 goes LOW) coincident with or before WE# goes HIGH, the outputs
will remain at high impedance.
(4) If OE# is HIGH during the write cycle, the outputs will remain at high impedance.
(5) Because I/O signals may be in the output state at this time, input signals of reverse polarity must
not be applied.
Preliminary
10
Rev 1.0
July 2001