ESMT
M52D128168A
DC CHARACTERISTICS
Recommended operating condition unless otherwise noted,TA = 0 to 70 °C
Version
Parameter
Symbol
Test Condition
Unit Note
-7
-7.5
-10
Burst Length = 1
tRC ≥ tRC (min), tCC ≥ tCC (min), IOL= 0mA
Operating Current
(One Bank Active)
ICC1
70
65
65
mA
1
Precharge Standby
Current in power-down
mode
ICC2P
0.5
0.5
CKE ≤ VIL(max), tCC =15ns
mA
mA
ICC2PS
CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC =10ns
10
10
mA
mA
mA
ICC2N
Precharge Standby
Current in non
power-down mode
Input signals are changed one time during 20ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC2NS
ICC3P
5
2
CKE ≤ VIL(max), tCC =15ns
Active Standby Current
in power-down mode
ICC3PS
CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC=15ns
Active Standby Current
in non power-down
mode
Input signals are changed one time during 2clks
ICC3N
25
mA
All other pins ≥ VDD-0.2V or ≤ 0.2V
(One Bank Active)
CKE ≥ VIH (min), CLK ≤ VIL(max), tCC= ∞
15
75
mA
mA
ICC3NS
Input signals are stable
IOL= 0mA, Page Burst
All Band Activated, tCCD = tCCD (min)
Operating Current
(Burst Mode)
80
70
1
2
ICC4
Refresh Current
130
15
120
45
100
70
ICC5
tRFC ≥ tRFC(min)
uA
°C
TCSR range
4 Banks
380
360
340
400
380
350
450
450
350
Self Refresh Current
ICC6
CKE ≤ 0.2V
uA
uA
2 Bank
1 Bank
Deep Power Down
Current
ICC7
CKE ≤ 0.2V
10
Note: 1.Measured with outputs open. Addresses are changed only one time during tCC(min).
2.Refresh period is 64ms. Addresses are changed only one time during tCC(min).
Elite Semiconductor Memory Technology Inc.
Publication Date: Aug. 2009
Revision: 1.3 4/48