欢迎访问ic37.com |
会员登录 免费注册
发布采购

M52D128168A-10BIG 参数 Datasheet PDF下载

M52D128168A-10BIG图片预览
型号: M52D128168A-10BIG
PDF下载: 下载PDF文件 查看货源
内容描述: 2M ×16位×4银行同步DRAM [2M x 16 Bit x 4 Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 47 页 / 1134 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
 浏览型号M52D128168A-10BIG的Datasheet PDF文件第39页浏览型号M52D128168A-10BIG的Datasheet PDF文件第40页浏览型号M52D128168A-10BIG的Datasheet PDF文件第41页浏览型号M52D128168A-10BIG的Datasheet PDF文件第42页浏览型号M52D128168A-10BIG的Datasheet PDF文件第44页浏览型号M52D128168A-10BIG的Datasheet PDF文件第45页浏览型号M52D128168A-10BIG的Datasheet PDF文件第46页浏览型号M52D128168A-10BIG的Datasheet PDF文件第47页  
ESMT  
M52D128168A  
Operation Temperature Condition -40°C~85°C  
Mode Register Set Cycle  
Extended Mode Register Set Cycle  
0
1
2
3
4
5
6
0
1
2
3
4
5
6
C L O C K  
C K E  
C S  
C L O C K  
C K E  
C S  
H I G H  
HI G H  
* N o t e 2  
* N o t e 2  
R A S  
R A S  
* N o t e 1  
* N o t e 3  
* N o t e 1  
* N o t e 3  
C A S  
C A S  
A D D R  
A D D R  
K e y  
R a  
K e y  
R a  
B A 1  
B A 0  
A 1 0  
D Q  
B A 1  
B A 0  
B S  
B S  
B S  
B S  
A 1 0  
HI - Z  
H I - Z  
DQ  
W E  
W E  
D Q M  
D Q M  
Ne w  
Co m m a n d  
Ne w  
Co m m a n d  
M R S  
E M RS  
: Don 't C a re  
All banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.  
MODE REGISTER SET CYCLE  
*Note : 1. CS , RAS , CAS , & WE activation at the same clock cycle with address key will set internal  
mode register.  
2. Minimum 2 clock cycles should be met before new RAS activation.  
3. Please refer to Mode Register Set table.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Sep. 2008  
Revision: 1.0 43/47  
 复制成功!