ESMT
Parameter
Write Cycle[13]
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
BW
t
SD
t
HD
t
HZWE
t
LZWE
Description
Write Cycle Time
CE1 LOW and CE2 HIGH to Write
End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE
Pulse Width
BLE
/
BHE
LOW to Write End
M24L816512DA
Switching Characteristics (Over the Operating Range) (continued)[10, 11, 12, 13, 14]
-55
Min.
55
45
45
0
0
40
50
42
0
25
5
5
Max.
Min.
70
55
55
0
0
55
55
42
0
25
-70
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Set-up to Write End
Data Hold from Write End
WE
LOW to High-Z[11, 12]
WE
HIGH to Low-Z[11, 12]
Switching Waveforms
Read Cycle 1 (Address Transition Controlled)[14, 15, 16]
Read Cycle 2 (
OE Controlled)[14, 15]
Notes:
15.
WE
is HIGH for Read Cycle.
16. Device is continuously selected. OE , CE = V
IL
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Jul. 2008
Revision
:
1.1
5/12
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
