ESMT
Switching Characteristics Over the Operating Range (continued)[10]
Parameter
t
BW
t
SD
t
HD
t
HZWE
t
LZWE
Description
BLE/BHE LOW to Write End
Data Set-Up to Write End
Data Hold from Write End
WE
LOW to High-Z[11, 13]
WE
HIGH to Low-Z[11, 13]
M24L216128SA
-55 [14]
Min.
Max.
50
25
0
25
5
-70
Min.
60
45
0
25
5
Max.
Unit
ns
ns
ns
ns
ns
Switching Waveforms
Read Cycle 1 (Address Transition Controlled)[15, 16, 17]
Read Cycle 2 (
OE
Controlled)[16, 17]
Notes:
15. Device is continuously selected. OE , CE = V
IL
.
16.
WE
is HIGH for Read Cycle.
17. For the 55-ns Cycle, the addresses must not toggle once the read is started on the device. For the 70-ns Cycle, the
addresses must be stable within 10 ns after the start of the read cycle.
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Jul. 2008
Revision
:
1.2
6/14
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
