ESMT
PSRAM
M24L16161ZA
16-Mbit (1M x 16)
Async / Page Pseudo Static RAM
Features
• Voltage range: 2.7V – 3.3 V
• Access Time: 70 ns
• Ultra-low active power
— Maximum active current: 20 mA (for random Read/ Write)
— Maximum active current: 20 mA (for page Read)
• Ultra low standby power
• 16-word Page Mode
• Low-power features:
— Temperature-compensated refresh (TCR)
— On-chip temperature sensor
— Partial-array refresh (PAR)
— Deep power-down (DPD) mode
• CMOS for optimum speed/power
• Operating Temperature (T
C
): –25°C to +85°C (Extended)
Ordering Information
Product ID
M24L16161ZA-70BEG
Speed
(ns)
70
Package
48-ball BGA
Operating
Temperature
Extended
Comments
Pb-free
Functional Description
The device is a high-performance CMOS Pseudo Static RAM
organized as 1M words by 16 bits that supports an
asynchronous memory interface. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for portable applications such as cellular
telephones. A refresh configuration register (RCR) is used to
control how refresh is performed on the DRAM array. This
register is automatically loaded with default settings during
power-up and can be updated anytime during normal
operation.
There are three system-accessible mechanisms to minimize
refresh current. Temperature-compensated refresh (TCR)
uses an on-chip sensor to adjust the refresh rate to match the
device temperature. The refresh rate decreases at lower
temperatures to minimize current consumption during standby.
Setting sleep enable (
ZZ
) to LOW enables one of two
low-power modes: partial-array refresh (PAR) or deep
power-down (DPD). PAR limits refresh to only that part of the
DRAM array that contains essential data. DPD halts refresh
operation altogether and is used when no vital information is
stored in the device. The system-configurable refresh
mechanisms are accessed through the RCR
.
Elite Semiconductor Memory Technology Inc.
Publication Date
:
Dec. 2010
Revision: 1.0
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