ESMT
M13S5121632A
Power up & Initialization Sequence
11
12
13
15
17
19
1
2
3
9
10
14
16
18
6
8
4
5
7
0
C L K
C L K
Hi g h l e v el i s re q ui r e d
C K E
C S
R A S
C A S
W E
B A 0
BA1,A9,
A11 ~A12
A 1 0 / A P
A8
A7
A DD R E S S K E Y
A 1 ~ A 6
A0
M i n i m u m 2 0 0 C y c l e
H i g h - Z
D Q
t
M R D
t
R P
t
R P
t
R C
t
R C
M i n i m u m of
2 R e f r es h C yc l e s a r e re q u i r e d
H i g h - Z
D Q S
P r ec ha r g e
A l l B a n k
E M RS
DLL En abl e
A n y
C o m m a n d
P r e ch a r g e
A l l B a nk
(Power & Clock must be
stable for 20 0 u s
before precharge
All Bank)
2 n d A u t o R e f r e sh
Mo d e R e s i st e r S et
1 st Au t o Re f resh
M RS
D L L Re se t
:
D o n' t C a r e
Elite Semiconductor Memory Technology Inc.
Publication Date : Oct. 2008
Revision : 1.0 43/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
