ESMT
Pin Description
(M13S256328A)
Pin Name
Function
Address inputs
- Row address A0~A11
- Column address A0~A7, A9
A8/AP : AUTO Precharge
BA0, BA1 : Bank selects (4 Banks)
Data-in/Data-out
Row address strobe
Column address strobe
Write enable
Ground
Power
Bi- directional Data Strobe.
DQS0 correspond to the data on DQ0~DQ7.
DQS1 correspond to the data on DQ8~DQ15.
DQS2 correspond to the data on DQ16~DQ23.
DQS3 correspond to the data on DQ24~DQ31.
Pin Name
M13S256328A
Function
A0~A11,
BA0,BA1
DM0~DM3
DQ Mask enable in write cycle.
DQ0~DQ31
RAS
CAS
WE
CLK, CLK
CKE
CS
V
DDQ
V
SSQ
V
REF
Clock input
Clock enable
Chip select
Supply Voltage for GDQ
Ground for DQ
Reference Voltage for SSTL
V
SS
V
DD
DQS0~DQS3
(for FBGA)
NC
No connection
Absolute Maximum Rating
Parameter
Voltage on any pin relative to V
SS
Voltage on V
DD
supply relative to V
SS
Voltage on V
DDQ
supply relative to V
SS
Storage temperature
Power dissipation
Short circuit current
Note :
Symbol
V
IN
, V
OUT
V
DD
, V
DDQ
V
DDQ
T
STG
P
D
I
OS
Value
-0.5 ~ 3.6
-1.0 ~ 3.6
-0.5 ~ 3.6
-55 ~ +150
TBD
50
Unit
V
V
V
°C
W
mA
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2007
Revision : 1.2
3/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
