ESMT
M13S128324A
Current State
Address
Command
DESEL
Action
CS RAS CAS WE
H
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
X
H
H
H
L
X
H
H
L
X
H
L
X
NOP (Idle after tRP
NOP (Idle after tRP
ILLEGAL
)
)
X
NOP
BA
Burst Stop
READ/WRITE
Active
X
H
L
BA, CA, A8
ILLEGAL
RE-FRESHING
H
H
L
BA, RA
ILLEGAL
L
BA, A8
PRE / PREA
Refresh
ILLEGAL
L
H
L
X
ILLEGAL
L
L
Op-Code Mode-Add
MRS
ILLEGAL
X
H
H
H
L
X
H
H
L
X
H
L
X
DESEL
NOP (Idle after tRP
NOP (Idle after tRP
ILLEGAL
)
)
X
NOP
BA
Burst Stop
READ / WRITE
Active
MODE
REGISTER
SETTING
X
H
L
BA, CA, A8
ILLEGAL
H
H
L
BA, RA
ILLEGAL
L
BA, A8
PRE / PREA
Refresh
ILLEGAL
L
H
L
X
ILLEGAL
L
L
Op-Code Mode-Add
MRS
ILLEGAL
ABBREVIATIONS :
H = High Level, L = Low level, V = Valid, X = Don’t Care
BA = Bank Address, RA =Row Address, CA = Column Address, NOP = No Operation
Note :
1. All entries assume that CKE was High during the preceding clock cycle and the current clock cycle.
2. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA, depending on the state of the
bank.
3. Must satisfy bus contention, bus turn around and write recovery requirements.
4. NOP to bank precharging or in idle state. May precharge bank indicated by BA.
5. ILLEGAL of any bank is not idle.
6. Same bank’s previous auto precharg will not be performed. But if the bank is different, previous auto precharge will
be performed.
7. Refer to “Read with Auto Precharge: for more detailed information.
ILLEGAL = Device operation and / or data integrity are not guaranteed.
Elite Semiconductor Memory Technology Inc.
Publication Date : May. 2007
Revision : 1.8 31/49
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
