ESMT
AC OPERATING TEST CONDITIONS
(V
DD
= 2.5V
±
0.2V
,
T
A
= 0 to 70 °C )
Parameter
Input levels (Vih/Vil)
Input timing measurement reference level
Input rise and fall-time
Output timing measurement reference level
Output load condition
Value
0.9 * V
DDQ
/ 0.2
0.5 * V
DDQ
tr/tf = 1/1
0.5 * V
DDQ
See Fig. 2
M12S64322A
Unit
V
V
ns
V
(Fig. 1) DC Output Load Circuit
(Fig. 2) AC Output Load Circuit
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Version
Parameter
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
Row cycle time
@ Operating
Symbol
-6
t
RRD(min)
t
RCD(min)
t
RP(min)
t
RAS(min)
t
RAS
(max)
t
RC(min)
t
CDL(min)
t
RDL(min)
t
BDL(min)
60
1
2
1
12
18
18
42
100
63
-7
14
20
20
42
ns
ns
ns
ns
us
ns
CLK
CLK
CLK
1
2
2
2
1
1
1
1
Unit
Note
Last data in to col. address delay
Last data in to row precharge
Last data in to burst stop
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2009
Revision: 1.1
6/46