ESMT
PARAMATER
CLK cycle time
CLK to valid
output delay
Output data
hold time
CLK high pulsh width
CLK low pulsh width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
Note :
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
SYMBOL
t
CC
-5
MIN
5
10
MAX
1000
4.5
6
2.0
2.0
2.5
2.5
1.5
1
0
4.5
6
2.5
2.5
2.5
2.5
1.5
1
0
M12L64164A
Operation Temperature Condition -40°C~85°C
-6
MIN
6
10
MAX
1000
5.5
6
2.5
2.5
2.5
2.5
1.5
1
0
5.5
6
6
6
MIN
7
10
-7
MAX
1000
6
6
AC CHARACTERISTICS
(AC operating condition unless otherwise noted)
UNIT
ns
NOTE
1
t
SAC
ns
1,2
t
OH
t
CH
t
CL
t
SS
t
SH
t
SLZ
t
SHZ
ns
ns
ns
ns
ns
ns
ns
2
3
3
3
3
2
-
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.
3. Assumed input rise and fall time (tr & tf) =1ns.
If tr & tf is longer than 1ns. transient time compensation should be considered.
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.
Elite Semiconductor Memory Technology Inc.
Publication Date:
Dec.
2007
Revision: 1.2
7/45
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
