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M12L64164A-6BIG 参数 Datasheet PDF下载

M12L64164A-6BIG图片预览
型号: M12L64164A-6BIG
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行同步DRAM [1M x 16 Bit x 4 Banks Synchronous DRAM]
分类和应用: 存储内存集成电路动态存储器
文件页数/大小: 45 页 / 821 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
M12L64164A  
Operation Temperature Condition -40°C~85°C  
FUNCTION TRUTH TABLE (TABLE2)  
Current  
State  
CKE  
( n-1 )  
H
L
L
L
L
L
L
H
L
CKE  
n
ADDR  
ACTION  
Note  
CS RAS CAS WE  
X
H
H
H
H
H
L
X
H
H
H
H
H
L
H
L
L
L
L
L
L
L
L
X
H
L
L
L
X
X
H
H
H
L
X
X
X
H
H
H
L
X
X
X
H
H
H
L
X
X
H
H
L
X
X
X
X
H
H
L
X
X
X
X
H
H
L
H
H
L
X
X
H
L
X
X
X
X
X
H
L
X
X
X
X
X
H
L
X
H
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INVALID  
Exit Self Refresh Æ Idle after tRFC (ABI)  
Exit Self Refresh Æ Idle after tRFC (ABI)  
ILLEGAL  
6
6
Self  
Refresh  
ILLEGAL  
ILLEGAL  
L
X
X
H
L
L
L
NOP (Maintain Self Refresh)  
INVALID  
Exit Self Refresh Æ ABI  
Exit Self Refresh Æ ABI  
ILLEGAL  
All  
Banks  
Precharge  
Power  
7
7
L
L
L
L
ILLEGAL  
ILLEGAL  
Down  
L
L
X
X
H
L
L
L
L
L
L
NOP (Maintain Low Power Mode)  
Refer to Table1  
H
H
H
H
H
H
H
H
H
L
Enter Power Down  
Enter Power Down  
ILLEGAL  
8
8
X
X
X
RA  
X
X
All  
Banks  
Idle  
ILLEGAL  
Row (& Bank) Active  
NOP  
Enter Self Refresh  
Mode Register Access  
NOP  
Refer to Operations in Table 1  
Begin Clock Suspend next cycle  
Exit Clock Suspend next cycle  
Maintain Clock Suspend  
L
L
8
L
L
L
L
OP Code  
L
H
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Any State  
other than  
Listed  
H
H
L
9
9
above  
L
Abbreviations : ABI = All Banks Idle, RA = Row Address  
*Note : 6.CKE low to high transition is asynchronous.  
7.CKE low to high transition is asynchronous if restart internal clock.  
A minimum setup time 1CLK + tSS must be satisfy before any command other than exit.  
8.Power down and self refresh can be entered only from the all banks idle state.  
9.Must be a legal command.  
Elite Semiconductor Memory Technology Inc.  
Publication Date: Dec. 2007  
Revision: 1.2 27/45  
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