ESMT
M12L32162A
Write Interrupted by Precharge Command & Write Burst stop Cycle @ Burst Length =Full page
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C L O C K
C K E
H I G H
C S
RA S
CA S
RA a
CA a
A D D R
BA
CA b
A10 /AP
RA a
tB D L
tR D L
* N o t e 2
D Q
DAa0
DAb2 DAb3
DAb0 DAb1
DAb4
DAa1 DAa2 DAa3 DAa4
DAb5
W E
D Q M
W ri t e
( A - Ba n k )
Ro w A c t i ve
( A- B an k )
Bu rst Sto p
W ri t e
( A - Ba n k )
Pr echarg e
( A- B an k )
:D on ' t C ar e
*Note: 1. Burst can’t end in full page mode, so auto precharge can’t issue.
2.Data-in at the cycle of interrupted by precharge can not be written into the corresponding memory cell. It is defined by
AC parameter of tRDL.
DQM at write interrupted by precharge command is needed to prevent invalid write.
Input data after Row precharge cycle will be masked internally.
3.Burst stop is valid at every burst length.
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2009
Revision : 1.2 21/29
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
