M12L16161A
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
Parameter
CLK cycle time
CLK to valid
output delay
CAS Latency =3
CAS Latency =2
CAS Latency =3
CAS Latency =2
Symbol
-4.3
-5
-5.5
-6
-7
-8
Unit Note
Min Max Min Max Min Max Min Max Min Max Min Max
4.3
6
-
-
2
1.7
1.7
1.7
1
1
-
-
4
5
1000
4
5
5
7
-
-
2
2
2
2
1
1
-
-
4.5
5
1000
4.5
5
5.5
7.5
-
-
2.5
2
2
2
1
1
-
-
5
6
1000
5
6
6
8
-
-
2.5
2
2
2
1
1
-
-
5.5
6
1000
5.5
6
7
8.6
-
-
2.5
2.5
2.5
2
1
1
-
-
6
6
1000
6
6
8
10
-
-
2.5
3
3
2.5
1
1
-
-
6
7
1000 ns
6
7
ns
ns
ns
ns
ns
ns
ns
ns
1
1
2
3
3
3
3
2
t
CC
t
SAC
t
OH
t
CH
t
CL
t
SS
t
SH
t
SLZ
t
SHZ
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
CAS Latency =3
CAS latency =2
*All AC parameters are measured from half to half.
Note:
1.Parameters depend on programmed CAS latency.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to
the parameter.
Elite Semiconductor Memory Technology Inc.
P.6
Publication Date : Jan. 2000
Revision : 1.3u
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
