ESMT
M12L128324A
Operation temperature condition -40°C~85°C
SIMPLIFIED TRUTH TABLE
COMMAND
CKEn-1 CKEn
DQM BA0,1 A10/AP A9~A0 Note
CS RAS CAS WE
1,2
3
Register
Refresh
Mode Register set
Auto Refresh
H
X
H
L
L
L
L
L
X
OP CODE
H
L
L
L
H
X
X
3
Entry
Self
3
Refresh
L
H
L
H
X
L
H
X
H
H
X
H
X
X
X
Exit
L
H
H
H
X
X
X
3
Bank Active & Row Addr.
V
V
Row Address
Auto Precharge Disable
L
Column
Address
(A0~A7)
4
Read &
L
H
L
H
X
Column Address
Auto Precharge Enable
Auto Precharge Disable
H
L
4,5
4
Column
Address
(A0~A7)
Write &
H
H
H
X
X
X
L
L
L
H
H
L
L
H
H
L
L
L
X
X
X
V
Column Address
Auto Precharge Enable
H
4,5
6
Burst Stop
X
Bank Selection
All Banks
V
X
L
Precharge
X
H
H
L
X
V
X
X
V
X
X
V
X
Clock Suspend or
Active Power Down
Entry
Exit
H
L
L
H
L
X
X
X
X
X
H
L
X
H
X
V
X
H
X
V
X
H
X
V
Entry
H
X
Precharge Power Down Mode
H
L
Exit
L
H
X
X
DQM
H
H
X
X
V
X
X
X
7
H
L
X
H
X
H
No Operating Command
H
(V = Valid , X = Don’t Care. H = Logic High , L = Logic Low )
Note : 1.OP Code : Operating Code
A0~A11 & BA0~BA1 : Program keys. (@ MRS)
2.MRS can be issued only at all banks precharge state.
A new command can be issued after 2 CLK cycles of MRS.
3.Auto refresh functions are as same as CBR refresh of DRAM.
The automatical precharge without row precharge of command is meant by “Auto”.
Auto/self refresh can be issued only at all banks idle state.
4.BA0~BA1 : Bank select addresses.
If both BA1 and BA0 are “Low” at read ,write , row active and precharge ,bank A is selected.
If both BA1 is “Low” and BA0 is “High” at read ,write , row active and precharge ,bank B is selected.
Elite Semiconductor Memory Technology Inc.
Publication Date: Feb. 2006
Revision: 1.1 10/49
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
