ESMT
M12L128168A
Note : 1. All input expect CKE & DQM can be don’t care when CS is high at the CLK high going edge.
2. Bank active @ read/write are controlled by A13~A12.
A13
0
A12
0
Active & Read/Write
Bank A
0
1
Bank B
1
0
Bank C
1
1
Bank D
3. Enable and disable auto precharge function are controlled by A10/AP in read/write command
A10/AP
A13
0
A12
0
Operating
Disable auto precharge, leave A bank active at end of burst.
Disable auto precharge, leave B bank active at end of burst.
Disable auto precharge, leave C bank active at end of burst.
Disable auto precharge, leave D bank active at end of burst.
Enable auto precharge , precharge bank A at end of burst.
Enable auto precharge , precharge bank B at end of burst.
Enable auto precharge , precharge bank C at end of burst.
Enable auto precharge , precharge bank D at end of burst.
0
1
0
1
0
1
1
0
0
0
1
1
1
0
1
1
4. A10/AP and A13~A12 control bank precharge when precharge is asserted.
A10/AP
A13
0
A12
0
Precharge
Bank A
0
0
0
0
1
0
1
Bank B
1
0
Bank C
1
1
Bank D
X
X
All Banks
Elite Semiconductor Memory Technology Inc.
Publication Date: Oct. 2006
Revision: 2.0 28/43
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
