ESMT
F49L800UA/F49L800BA
Table 5. F49L800UA/F49L800BA Software Command Definitions
1st Bus
Cycle
2nd Bus
Cycle
3rd Bus
Cycle
4th Bus
Cycle
5th Bus
Cycle
6th Bus
Cycle
Bus
Cycles
Command
Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data
Reset (5)
Read (4)
1
1
4
4
6
6
6
6
XXXH F0H
RA RD
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Word
555H AAH 2AAH 55H 555H A0H
AAAH AAH 555H 55H AAAH A0H
PA
PA
PD
PD
Program
Byte
Word
Byte
Word
Byte
555H AAH 2AAH 55H 555H 80H 555H AAH 2AAH 55H 555H 10H
AAAH AAH 555H 55H AAAH 80H AAAH AAH 555H 55H AAAH 10H
Chip Erase
Sector Erase
555H AAH 2AAH 55H 555H 80H 555H AAH 2AAH 55H
AAAH AAH 555H 55H AAAH 80H AAAH AAH 555H 55H
SA
SA
30H
30H
Sector Erase
Suspend (6)
1
1
XXXH B0H
XXXH 30H
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Sector Erase Resume
(7)
-
Auto-select
See Table 6.
X = don’t care
RA = Address of memory location to be read.
RD = Data to be read at location RA.
PA = Address of memory location to be programmed.
PD = Data to be programmed at location PA.
SA = Address of the sector.
Notes:
1. Except Read command and Auto-select command, all command bus cycles are write operations.
2. The system should generate the following address patterns: 555H or 2AAH to address A10~A0 in word mode
/ AAAH or 555H to address A10~A-1 in byte mode.
3. Address bits A19–A11 are don’t cares, unless SA or PA required.
4. The Reset command is required to return to reading array data when device is in the auto-select mode, or if
DQ5 goes high (while the device is providing status data).
5. No command cycles required when reading array data.
6. The system may read and program in non-erasing sectors, or enter the auto-select mode, when in the Erase
Suspend mode. The Erase Suspend command is valid only during a sector erase operation.
7. The Erase Resume command is valid only during the Erase Suspend mode.
Elite Semiconductor Memory Technology Inc.
Publication Date : Jan. 2008
Revision: 1.6 10/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
