ESMT
F49L320UA/F49L320BA
Operation Temperature Condition -40°C~85°C
OPERATING RANGES
Commercial (C) Devices Ambient Temperature (TA) . . . . . . . . . . . -40 °C to +85°C
VCC Supply Voltages VCC for all devices . . . . . . . . . . . . . . . . . . . . .2.7 V to 3.6 V
Operating ranges define those limits between which the functionality of the device is guaranteed.
Table 12. Capacitance TA = 25°C , f = 1.0 MHz
Symbol
CIN1
Description
Input Capacitance
Conditions
VIN = 0V
Min.
Typ.
Max.
8
Unit
pF
CIN2
COUT
Control Pin Capacitance
Output Capacitance
VIN = 0V
VOUT = 0V
12
12
pF
pF
9. DC CHARACTERISTICS
Table 13. DC Characteristics TA = -40°C to 85°C, VCC = 2.7V to 3.6V
Symbol
ILI
Description
Conditions
VIN = VSS or VCC, VCC = VCC max.
VCC = VCC max; A9=10.5V
VOUT = VSS or VCC, VCC = VCC max
@5MHz
Min.
Typ.
Max.
1
35
1
Unit
uA
uA
uA
mA
Input Leakage Current
A9 Input Leakage Current
Output Leakage Current
ILIT
ILO
9
2
25
= VIL,
= VIH
OE
CE
@1MHz
5
mA
( Byte Mode )
ICC1
VCC Active Read Current
@5MHz
@1MHz
9
2
40
5
50
mA
mA
mA
uA
= VIL, = VIH
CE
OE
( Word Mode )
= VIL,
ICC2
ICC3
VCC Active write Current
= VIH
OE
= VCC 0.3V
20
25
CE
;
VCC Standby Current
VCC Standby Current
During Reset
100
100
CE RESET
= VSS 0.3V
ICC4
25
25
uA
RESET
VIH = VCC 0.3V; VIL = VSS 0.3V
ICC5
VIL
VIH
Automatic sleep mode
Input Low Voltage(Note 1)
Input High Voltage
100
0.8
uA
V
-0.5
0.7x VCC
VCC + 0.3
V
Voltage for Auto-Select
and Temporary Sector
Unprotect
Output Low Voltage
Output High Voltage(TTL)
Output High Voltage
Low VCC Lock-out Voltage
VID
VCC =3.3V
10
10.5
0.45
V
V
VOL
VOH1
VOH2
VLKO
IOL = 4.0mA, VCC = VCC min
IOH = -2mA, VCC = VCC min
IOH = -100uA, VCC min
0.7x VCC
VCC -0.4
2.3
2.5
V
Notes :
1. VIL min. = -1.0V for pulse width is equal to or less than 50 ns.
VIL min. = -2.0V for pulse width is equal to or less than 20 ns.
2. VIH max. = VCC + 1.5V for pulse width is equal to or less than 20 ns
If VIH is over the specified maximum value, read operation cannot be guaranteed.
3. Automatic sleep mode enable the low power mode when addresses remain stable for tACC + 30 ns
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2008
Revision: 1.1 26/55
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
