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F49L320BA 参数 Datasheet PDF下载

F49L320BA图片预览
型号: F49L320BA
PDF下载: 下载PDF文件 查看货源
内容描述: 32兆位( 4M ×8 / 2M ×16 ) 3V只有CMOS闪存 [32 Mbit (4M x 8/2M x 16) 3V Only CMOS Flash Memory]
分类和应用: 闪存
文件页数/大小: 55 页 / 544 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT  
F49L320UA/F49L320BA  
Operation Temperature Condition -40°C~85°C  
Figure 16 shows the algorithms and Figure 15 shows the  
timing diagram. This method uses standard microprocessor  
bus cycle timing. For sector unprotect, all unprotected  
sectors must first be protected prior to the first sector  
unprotect write cycle.  
Output Disable Mode  
With the  
is at a logic high level (V ), outputs from the  
IH  
OE  
devices are disabled. This will cause the output pins in a high  
impedance state  
The alternate method intended only for programming  
equipment requires V  
on address pin A9,  
, and  
OE  
ID  
Standby Mode  
.
RESET  
When  
and  
are both held at V  
RESET  
± 0.3V, the  
CE  
device enter CMOS Standby mode. If  
CC  
and  
are  
CE  
RESET  
Auto-select Mode  
held at V , but not within the range of V  
device will still be in the standby mode, but the standby  
current will be larger.  
± 03V, t he  
The auto-select mode provides manufacturer and device  
identification and sector protection verification, through  
outputs on DQ7–DQ0. This mode is primarily intended for  
programming equipment to automatically match a device to  
be programmed with its corresponding programming  
algorithm. However, the auto-select codes can also be  
accessed in-system through the command register.  
IH  
CC  
If the device is deselected during auto algorithm of erasure or  
programming, the device draws active current I  
until the  
CC2  
operation is completed. I  
in the DC Characteristics table  
CC3  
represents the standby current specification.  
When using programming equipment, this mode requires  
V
(10 V to 10.5 V) on address pin A9. While address pins  
ID  
The device requires standard access time (t ) for read  
CE  
access from either of these standby modes, before it is ready  
to read data.  
A3, A2, A1, and A0 must be as shown in Table 4.  
To verify sector protection, all necessary pins have to be set  
as required in Table 4, the programming equipment may  
then read the corresponding identifier code on DQ7-DQ0.  
Sector Protect / Un-protect Mode  
To access the auto-select codes in-system, the host system  
can issue the auto-select command via the command  
register, as shown in Table 5. This method does not require  
The hardware sector protect feature disables both program  
and erase operations in any sector. The hardware sector  
unprotect feature re-enables both the program and erase  
operations in previously protected sectors. Sector  
protect/unprotect can be implemented via two methods.  
V . See “Software Command Definitions” for details on  
ID  
using the auto-select mode.  
The primary method requires V on the  
pin only,  
RESET  
ID  
and can be implemented either in-system or via  
programming equipment.  
7.2 Software Command Definitions  
Writing specific address and data commands or  
sequences into the command register initiates the  
device operations. Table 5 defines the valid register  
command sequences. Writing incorrect address and  
data values or writing them in the improper sequence  
resets the device to reading array data.  
All addresses are latched on the falling edge of  
or  
WE  
, whichever happens later. All data is latched on the  
CE  
rising edge of  
or  
, whichever happens first.  
WE  
CE  
Refer to the corresponding timing diagrams in the AC  
Characteristics section.  
Elite Semiconductor Memory Technology Inc.  
Publication Date : Sep. 2008  
Revision: 1.1  
12/55