ESMT
F49L160UA/F49L160BA
10.1 Read Operation
TA = 0C to 70C, VCC = 2.7V~3.6V
Table 14. Read Operations
-70
-90
Symbol
Description
Conditions
Unit
Min.
Max.
Min.
Max.
tRC
Read Cycle Time (Note 1)
Address to Output Delay
70
90
ns
ns
tACC
=
= VIL
70
70
30
90
90
35
CE OE
to Output Delay
CE
tCE
tOE
= VIL
ns
ns
OE
CE
= VIL
= VIL
to Output Delay
OE
High to Output Float
(Note1)
OE
tDF
16
30
ns
ns
ns
ns
CE
Output Enable
Read
0
10
0
0
10
0
tOEH
Toggle and
Data Polling
Hold Time
=
CE OE
= VIL
tOH
Address to Output hold
Notes :
1. Not 100% tested.
2. tDF is defined as the time at which the output achieves the open circuit condition and data is no longer
driven.
Figure 5. Read Timing Waveform
tR C
Addresses Stabl e
tA C C
Addr es s
C E
tD F
t O E
OE
tO E H
W E
tC E
tO H
H i gh - Z
H i gh - Z
Output Vali d
Outputs
RE S E T
RY/B Y
0V
Elite Semiconductor Memory Technology Inc.
Publication Date : Jan. 2008
Revision: 1.8 24/50
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
